Physical Design Engineer

About the role

Qualcomm Israel is seeking a motivated Physical Design Engineer to join its ASIC Physical Design team. The role involves implementing and verifying complex digital designs from netlist to GDSII on advanced FinFET process technologies. You will work under the guidance of senior engineers and collaborate across multiple functional groups.

Key responsibilities

• Support floorplanning, placement, clock tree synthesis (CTS), and routing under senior guidance.
• Assist in timing closure activities, including STA analysis, path debugging, and constraint verification.
• Run and analyze IR drop, signal integrity, and electromigration reports using standard EDA tools.
• Execute physical verification flows (DRC, LVS, DFM) and triage violations.
• Develop and maintain Python and TCL scripts to automate repetitive tasks.
• Contribute to flow development initiatives and document in‑house PD automation scripts.
• Explore agentic AI‑assisted design tools for automated constraint checking and design space exploration.
• Collaborate with front‑end, DFT, and verification teams on design handoffs and ECO implementation.

Required profile

• B.Sc. in Electrical Engineering, Computer Engineering, or a related field.
• 0–3 years of experience in digital physical design (including academic projects or internships).
• Basic understanding of floorplanning, placement, CTS, and static timing analysis concepts.
• Familiarity with at least one major EDA tool such as Synopsys ICC2, Cadence Innovus, Calibre, or PrimeTime.
• Ability to read, modify, and write scripts in Python or TCL.
• Eagerness to learn advanced FinFET process nodes (TSMC N5, N4P, N3).

Required skills

• Python
• TCL
• Synopsys ICC2
• Cadence Innovus
• Calibre
• PrimeTime
• Floorplanning
• Placement
• Clock tree synthesis (CTS)
• Routing
• Static timing analysis (STA)
• IR drop analysis
• Signal integrity analysis
• Electromigration analysis
• Design rule checking (DRC)
• Layout versus schematic (LVS)
• Design for manufacturability (DFM)
• TSMC N5/N4P/N3 FinFET process nodes