SoC Chip Architect – High‑Performance Silicon Design

About the role

Google’s AI and Infrastructure team is seeking a senior SoC Chip Architect to lead the definition of a first‑generation product family that powers next‑generation hardware for Google Cloud services. The role combines system‑level reasoning with detailed silicon implementation, delivering high‑performance, energy‑efficient, and secure SoCs for edge and data‑center applications.

Key responsibilities

• Define and drive the architecture of high‑performance SoCs from concept through production.
• Design multi‑chiplet systems, interconnects, memory hierarchies, and I/O subsystems.
• Collaborate with cross‑functional partners to translate system requirements into silicon specifications.
• Develop security architectures, debug infrastructure, and secure‑boot sequences.
• Produce detailed architecture specifications and documentation.

Required profile

• Bachelor’s degree in Electrical or Computer Engineering (Master’s/PhD preferred).
• At least 5 years of experience leading SoC architectural definition.
• Hands‑on experience with multi‑chiplet silicon processes.
• Knowledge of functional safety (FuSa) and ASIL compliance.

Required skills

• SoC architecture, interconnect design, memory hierarchy design.
• Multi‑chiplet system integration.
• Functional safety (FuSa) and ASIL standards.
• Security architecture, debug infrastructure, secure‑boot implementation.
• Writing detailed architecture specifications.