Senior Hardware Engineer – High-Speed Board Design

About the role

We are looking for a senior hardware engineer to lead the end‑to‑end design of advanced high‑speed boards, from concept and architecture through to production and mass manufacturing. The role focuses on cutting‑edge interconnect technologies such as 224G SerDes, PCIe Gen5‑7 and DDR5, and requires close collaboration with SI/PI, mechanical, firmware, FPGA and ODM teams.

Key responsibilities

• Own the full hardware lifecycle – system concept, architecture, schematic, layout, bring‑up, validation and production.
• Lead high‑speed board designs supporting 224G SerDes, PCIe Gen7 and DDR5 (RDIMM/SODIMM/soldered).
• Develop schematics and layouts using Cadence OrCAD Capture and Cadence Allegro PCB Designer.
• Architect power‑delivery solutions, including VRM selection, topology, sequencing and inrush control.
• Work with SI and PI teams on channel budgeting, insertion loss, crosstalk, jitter and equalisation strategies.
• Interface with FPGA teams, especially Intel (Altera) platforms, for high‑speed transceivers and memory interfaces.
• Collaborate with mechanical, firmware, validation and manufacturing groups, and lead ODM/EMS design reviews, DFM/DFA/DFT and issue resolution.

Required profile

• B.Sc. or M.Sc. in Electrical Engineering (or equivalent) with 10+ years of hands‑on high‑speed board design experience.
• Proven track record of taking boards from concept through to production.
• Deep knowledge of high‑speed interfaces (PCIe, SerDes, DDR) and multi‑rail power architectures.
• Strong communication and leadership skills, with experience mentoring junior engineers.

Required skills

• 224G SerDes, PCIe Gen5‑7, DDR5.
• Cadence OrCAD Capture and Cadence Allegro PCB Designer.
• VRM design, power sequencing and inrush control.
• Signal Integrity (SI) and Power Integrity (PI) analysis.
• Intel (Altera) FPGA platforms and high‑speed transceiver integration.
• High‑speed routing constraints, PCB stack‑up design and DFM/DFA/DFT.