Senior FC Verification & Simulation Infrastructure Engineer

About the role

We are seeking a senior full‑chip verification engineer to join NVIDIA’s Networking Silicon team. The role focuses on developing and verifying next‑generation NICs at the system level while advancing the simulation infrastructure that powers our verification flows.

Key responsibilities

• Identify bottlenecks in verification flows and build frameworks, optimize regressions, and accelerate simulation throughput.
• Develop across a multi‑language stack (SystemVerilog/UVM, Specman, Python, C/C++, scripting) from RTL testbenches to infrastructure utilities.
• Debug and analyze cross‑block issues, ensuring feature correctness and compliance with chip micro‑architecture.
• Leverage cutting‑edge AI coding tools to speed up verification and infrastructure development.
• Collaborate with architecture, micro‑architecture, firmware, and NIC teams to align verification strategies.

Required profile

• B.Sc. in Electrical or Computer Engineering (or equivalent experience) with strong academic performance.
• 8+ years of experience in verification, hardware simulation, or infrastructure development for silicon projects.
• Proven infrastructure mindset: ability to scale regression frameworks, improve simulation performance, and automate flows.
• Creative, proactive attitude toward adopting new methodologies and coding tools.
• Strong debugging, problem‑solving, and analytical abilities.
• Team player with effective communication skills.

Required skills

• SystemVerilog and UVM
• Specman
• Python
• C and C++
• Scripting languages (e.g., Bash, Perl)
• AI‑assisted coding tools
• Simulation and regression automation frameworks