Principal Signal/Power Integrity Engineer

About the role

Marvell is seeking a senior engineer to lead signal and power integrity efforts for its semiconductor products, shaping both package and system level solutions.

Key responsibilities

• Develop creative power solutions for Marvell devices at package and system levels.
• Evaluate designs to ensure they meet challenging electrical performance requirements.
• Collaborate closely with layout engineers and IP teams to optimize power delivery network (PDN) performance.
• Perform simulations, including new EDA tool evaluations, flow development, and scripting for efficiency improvements.
• Develop creative signal integrity solutions for high‑speed device interfaces and validate them with electromagnetic simulation tools.

Required profile

• BSc in Electrical Engineering with 10‑15 years of related experience.
• Deep expertise in power integrity, signal integrity, inductance, and capacitance.
• Strong understanding of package and board implementation limitations.
• Proven ability to collaborate across multiple geographies and excellent communication skills.

Required skills

• Power delivery network (PDN) design, modeling and analysis using PowerSI and SIwave.
• 3D electromagnetic extraction tools such as Ansys HFSS (advantage).
• Cadence Allegro schematics and layout tools.
• High‑speed signal integrity for interfaces such as DDR4, PCIe Gen3/4, 10G/25G/50G/100G/200Gbps Ethernet.
• Experience with 2.5D/3D package development and related packaging technologies.

What we offer

• Eligibility for Marvell’s bonus and equity plans, including a new‑hire equity grant and annual refreshers.
• Competitive compensation and comprehensive benefits in a collaborative, transparent, and inclusive environment.