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Post Silicon & System Validation Engineer Intern

altera · Jerusalem

New
Junior 🇬🇧 English
digital circuit timing

Job description

About the role

This internship involves performing functional and system validation of mixed‑signal IP in a lab environment to ensure designs meet specifications and deliver high‑quality products.

Key responsibilities

  • Execute validation plans, define test runs, develop recipes, and replicate issues with firmware, system, and analog design teams.
  • Develop IP validation environments to achieve coverage of mixed‑signal micro‑architecture specifications.

Required profile

  • Bachelor's degree student in electronic engineering.
  • Strong knowledge of digital circuits and timing, with fast learning ability and teamwork orientation.

Required skills

  • Digital circuit design
  • Timing analysis

Questions fréquentes

Le salaire n'est pas communiqué publiquement par le recruteur. Vous pouvez postuler et négocier directement avec altera.
Cliquez sur "Postuler maintenant" en haut de la page. Vous pouvez importer votre CV en 1 clic — Jobiglo extrait automatiquement vos informations et postule pour vous.
Source : ats:workday

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Published 1 day ago

Expires 1 month from now

10 views · 0 interested

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altera

Jerusalem