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PCB Layout Engineer - Silicon One

cisco · Caesarea

New
Senior 🇬🇧 English
Cadence Allegro OrCAD Siemens Xpedition Signal integrity Power integrity SerDes PCIe Ethernet DDR

Job description

About the role

Cisco Silicon One designs hardware platforms central to the AI era, powering its Switching, Routing and Wireless products. As a PCB CAD Engineer in the Caesarea lab, you will turn high-speed schematics into physical boards, solving placement and routing challenges for high-speed signals and power networks. You will work with electrical, mechanical, SI/PI and packaging teams.

Key responsibilities

  • Design complex PCB layouts for Silicon One hardware platforms
  • Solve placement and routing challenges for high-speed signals and power networks
  • Define layer stackups and enforce design rules
  • Support prototype bring-up and lab debug
  • Collaborate with electrical, mechanical, SI/PI and packaging teams

Required profile

  • B.Sc. in Electrical Engineering, Electronics Engineering or a related field, or equivalent practical experience
  • 3+ years of PCB layout and CAD experience in an R&D environment
  • Experience designing multilayer PCBs for complex electronic products

Required skills

  • Proficiency with Cadence Allegro and OrCAD
  • PREFERRED: strong understanding of PCB stack-ups, routing constraints, component placement and manufacturing requirements
  • PREFERRED: experience with high-speed interfaces such as SerDes, PCIe, Ethernet or DDR
  • PREFERRED: familiarity with signal integrity and power integrity design practices
  • PREFERRED: experience supporting EVB bring-up, lab debug and board failure analysis
  • PREFERRED: experience with Siemens Xpedition or other PCB CAD tools

Questions fréquentes

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Source : ats:workday

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Published 2 hours ago

Expires 1 month from now

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