Experienced System Design Engineer – PCIe Expert

About the role

We are seeking a hands‑on System Design Engineer with deep expertise in PCIe to lead the design, implementation and silicon validation of PCIe interfaces within our SoC products. The role involves end‑to‑end development from controller architecture to hardware‑firmware integration, ensuring high‑speed connectivity and NVMe compatibility.

Key responsibilities

• Define and implement PCIe controller and PHY IP, including configuration of Gen 4/5 (Gen 6 a plus).
• Develop protocol logic such as DOE, IDE, MFND/SR‑IOV and integrate CSRs for hardware‑firmware interaction.
• Design power‑management features (ASPM, L1 Substates) and system‑level reset sequences.
• Perform silicon bring‑up, PCIe link validation, data‑path optimization and NVMe compliance testing.
• Troubleshoot complex multi‑discipline issues using AI‑driven debug tools, protocol analyzers and high‑speed oscilloscopes.

Required profile

• 7 + years of experience as a System/Design/Validation Engineer focused on PCIe.
• Strong knowledge of PCIe Gen 4/5 standards; Gen 6 experience is a major plus.
• Solid understanding of NVMe protocol, queue management and command sets.
• Hands‑on experience with PCIe protocol analyzers and high‑speed test equipment.
• B.Sc. in Electrical Engineering or Computer Engineering.

Required skills

• PCIe Gen 4, Gen 5 (Gen 6 optional)
• NVMe protocol
• Python and C for test automation and debugging
• PCIe protocol analyzers
• High‑speed oscilloscopes
• Power‑management design (ASPM, L1 Substates)