Wireless Platform Architect

About the role

As a Wireless Platform Architect, you will play a key role in defining the architecture of Ceva's next‑generation Radio Subsystem (RSS) platforms for wireless technologies including Wi‑Fi, Bluetooth and UWB. You will take end‑to‑end responsibility for the system‑level architecture of a complete wireless communication subsystem, covering system specifications, implementation requirements, interface definitions and testing concepts.

Key responsibilities

• Define the RSS end‑to‑end architecture and HW/SW partitioning, including interfaces between radio, PHY, MAC, CPU/MCU, memories, PMU and clock/reset management.
• Design multi‑protocol operation mechanisms, covering HW interfaces, state machines, control flows and operation sequences.
• Specify sleep/wake‑up modes, testability, security and debug features.
• Drive power‑performance‑area (PPA) optimization and benchmark the RSS for low‑power operation, silicon area and overall efficiency.
• Collaborate with RF, PHY, hardware, firmware, verification and integration teams from early studies through RTL/FPGA validation and system bring‑up.

Required profile

• B.Sc. or M.Sc. in Electrical Engineering.
• Proven experience in system and architecture definition for hardware‑based wireless communication systems.
• Strong understanding of low‑power design, SoC architecture and IP integration (memory, interrupts, clocks, resets, power domains).
• Deep knowledge of VLSI/ASIC development processes, productization and system bring‑up flows.
• Excellent technical leadership and customer‑facing communication skills.

Required skills

• Wireless communication standards (Wi‑Fi, Bluetooth, Cellular, UWB).
• Low‑power design techniques.
• SoC architecture and IP integration.
• VLSI/ASIC development methodologies.
• RF integration, control and calibration.
• Signal processing and PHY architecture.
• MAC layer architecture.
• Embedded processors/MCUs and low‑level firmware architecture.
• Silicon validation, lab work and bring‑up.