Senior Chip Design Verification Engineer – Port IP Group
NVIDIA · Tel Aviv-Yafo
תיאור המשרה
About the role
NVIDIA is looking for a best‑in‑class Chip Design Verification Engineer to join our outstanding Networking Silicon Engineering team, developing the industry's top high‑speed communication devices with the highest throughput and lowest latency. You will play a significant part in verifying groundbreaking chips while working in a meaningful, growing, and highly professional environment.
Key responsibilities
- Work as a Chip Design Verification Engineer within a combined design and verification team that develops front‑end designs for Switch silicon, GPU and HCA.
- Plan and design verification units/blocks according to architecture and micro‑architecture specifications, focusing on power, area, and performance constraints.
- Collaborate closely with Architecture, Micro‑Architecture, and Firmware teams, interacting across organization‑wide groups.
Required profile
- Electrical Engineering, Computer Engineering or related degree with high academic scores, or equivalent experience.
- 5+ years of experience in RTL verification; high‑performing recent graduates may also be considered.
- Experience with full‑chip and cluster‑level verification is an advantage.
- Self‑motivated, able to work independently and drive tasks to completion.
- Strong communication and interpersonal skills, making you a great teammate.
Required skills
- Knowledge of Specman and Verilog.
- Understanding of networking concepts.
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NVIDIA
Tel Aviv-Yafo
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