Principal SoC System Architect

About the role

Renesas Electronics is looking for a Principal SoC System Architect in Raanana to own the system-level and full-chip architecture of next-generation high-end MPU products for robotics, physical AI, industrial networking and control, advanced vision, multimodal AI and other advanced embedded systems. The role works across a global, multidisciplinary organization and engages directly with Product Line and Engineering leaders from Director through Vice President level.

Key responsibilities

• Own and drive the system-level and full-chip architecture of next-generation MPU products, from early product definition through silicon bring-up and product validation.
• Translate customer use cases, workloads and product strategy into scalable, reusable SoC architectures across multiple product tiers.
• Define the full-chip SoC composition, data and control flows, shared resources, subsystem interfaces and integration architecture.
• Define system requirements and allocate performance, power, thermal, memory, bandwidth, latency, QoS, area and cost budgets, resolving conflicts.
• Use quantitative analysis of representative concurrent workloads to identify bottlenecks and validate architectural choices.
• Drive HW/SW co-development through early stakeholder engagement and clear definition of partitioning, interfaces, requirements and constraints.
• Assess trade-offs and implementation feasibility across performance, power, area, cost, software impact, risk and schedule.

Required profile

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science or a related technical discipline.
• Extensive experience in the top-level architecture of highly integrated MPU or application processor-class SoCs, with ownership from product definition through silicon bring-up and validation.
• Strong technical leadership and communication skills, able to structure incomplete requirements and drive alignment across global teams and senior stakeholders.
• Desirable: advanced degree, patents, publications, standards participation or recognized technical leadership in SoC architecture.

Required skills

• Broad knowledge of heterogeneous compute, memory hierarchy, cache coherency, interconnect, high-speed I/O, power management, security and platform integration.
• Ability to model system performance quantitatively and assess full-chip feasibility.
• Desirable: experience with high-performance MPU SoCs for robotics, physical AI, vision and multimodal AI, and with functional-safety or mixed-criticality SoCs (ISO 26262, IEC 61508).