Mixed-Signal Verification Team Lead

About the role

We are seeking a Mixed‑Signal Verification Team Lead to drive verification activities for next‑generation high‑speed communication technology. You will lead a distributed team of engineers, collaborate with analog and digital designers, and ensure robust verification of mixed‑signal designs.

Key responsibilities

• Lead and manage a globally distributed verification team, coordinating communication across time zones.
• Partner with analog and digital design groups to define specifications, verification plans, and milestones.
• Develop and integrate behavioral models of analog blocks into digital verification flows.
• Execute mixed‑signal dynamic verification using industry‑standard digital verification tools (excluding AMS).
• Debug complex mixed‑signal issues to guarantee functional and spec compliance.
• Design scalable, reusable verification environments using Verilog/SystemVerilog.
• Mentor team members and support their technical growth.
• Oversee project timelines, resource allocation, and reporting.

Required profile

• 8+ years of experience in mixed‑signal or digital mixed‑signal verification.
• 3+ years of experience leading or managing verification teams.
• Proven track record in behavioral modeling of analog designs for digital verification.
• Strong understanding of analog design fundamentals.

Required skills

• Verilog/SystemVerilog for testbench development and debugging.
• UVM methodology (preferred).
• Cadence or Synopsys verification toolsets.
• Virtuoso for analog schematic review.
• Behavioral modeling of analog blocks.
• Mixed‑signal dynamic verification using digital tools (excluding AMS).