Wireless Platform Architect

About the role

As a Wireless Platform Architect, you will play a key role in defining the architecture of Ceva's next-generation Radio Subsystem (RSS) platforms for wireless technologies including Wi‑Fi, Bluetooth and UWB. You will take end‑to‑end responsibility on the system‑level architecture of a complete wireless communication subsystem, including system specifications, implementation requirements, interface definitions and testing concepts.

Key responsibilities

• Define the RSS end‑to‑end architecture and HW/SW partitioning, covering interfaces between radio, PHY, MAC, CPU/MCU, memories, PMU, clock and reset management.
• Design multi‑protocol operation mechanisms, including HW interfaces, state machines, control flows and operation sequences.
• Specify sleep/wake‑up modes, testability, security and debug features.
• Drive PPA optimization and competitive benchmarking with focus on low‑power operation, silicon area and system efficiency.
• Collaborate with RF, PHY/algorithm, HW, SW/firmware, verification and integration teams from early studies through RTL/FPGA validation and system bring‑up.
• Engage directly with customers to define RSS integration into their SoC, supporting validation and productization.

Required profile

• B.Sc. or M.Sc. in Electrical Engineering.
• Proven experience in system and architecture definition for hardware‑based wireless communication systems.
• Experience with wireless standards such as Wi‑Fi, Bluetooth, Cellular IoT and UWB.
• Strong understanding of low‑power design and overall system architecture.
• Good knowledge of SoC architecture, IP integration, memory, interrupts, clocks, resets and power domains.
• Deep understanding of VLSI/ASIC development processes and productization flows.
• Technical leadership ability to drive architectural decisions and work effectively with multidisciplinary teams.
• Strong customer‑facing skills to translate requirements into system architecture.

Required skills

• Wi‑Fi, Bluetooth, UWB and Cellular IoT standards.
• Low‑power design techniques.
• SoC architecture and IP integration.
• VLSI/ASIC development and validation.
• RF integration, control and calibration.
• Signal processing and PHY architecture.
• MAC layer architecture.
• Embedded processors/MCUs and low‑level firmware architecture.