Verification Team Leader

About the role

We are seeking a Verification Team Leader to head a group of Verification Engineers within our advanced FPGA Systems Development Group at our Holon site. This position blends technical leadership, hands‑on verification work, and team management to ensure robust verification of complex FPGA designs.

Key responsibilities

• Lead and mentor a team of experienced Verification Engineers.
• Design and implement UVM‑based verification environments for sophisticated FPGA systems.
• Drive the end‑to‑end verification process from requirements definition through sign‑off at both block‑level and system‑level.
• Collaborate closely with Design, Architecture, Algorithm, System Engineering, and Integration teams.
• Define verification strategies, automation initiatives, and continuous improvement of methodologies.
• Introduce and integrate AI‑driven workflows and tools into the verification environment.
• Manage multiple projects simultaneously, prioritize tasks, and meet development schedules.

Required profile

• B.Sc. in Electrical Engineering, Computer Science, or a related discipline.
• Minimum 8 years of experience in verification engineering.
• Proven track record leading verification teams.
• Experience covering verification from block‑level to system‑level.
• Strong understanding of FPGA development processes.
• Excellent leadership, communication, and presentation abilities.
• Fast learner capable of adopting new technologies and methodologies.

Required skills

• SystemVerilog
• UVM methodology
• FPGA verification environments
• AI‑driven verification tools (explicitly mentioned)