Student Signal and Power Integrity Engineer

About the role

Altera is looking for a Student/Junior Signal and Power Integrity Engineer to join the SERDES Analog team in Haifa. The position supports integration of mixed‑signal and high‑speed SERDES IPs into silicon, packages and PCBs, offering hands‑on experience in a cutting‑edge environment.

Key responsibilities

• Define reference channels and extract parameters for SERDES IP simulation under senior guidance.
• Review and validate silicon IP parameters together with package and PCB designs.
• Participate in package and PCB schematic/layout reviews, analyze simulation results and help debug issues.
• Apply signal and power integrity concepts to simulate SIPI circuits, channels and I/Os for design optimisation.
• Support design quality by meeting power, performance and signal integrity requirements.
• Collaborate with cross‑functional teams to ensure successful IP, package and PCB integration.

Required profile

• B.Sc or M.Sc in Electrical Engineering with grades above 85, up to one year before graduation.
• Strong background in electromagnetic theory and wave physics.
• Highly motivated junior engineer with relevant university project experience.
• Team player eager to tackle challenging problems.

Required skills

• Basic or deep knowledge of Keysight ADS and HSPICE simulation tools.
• Experience with Ansys HFSS, Cadence Clarity or similar electromagnetic simulation software.
• Understanding of PCIe and IEEE Ethernet specifications.
• Familiarity with mixed‑signal and channel simulation concepts.