Senior CPU Logic Design Engineer (Out-of-Order Team)

About the role

Intel's Core Engineering Group develops the Intel Performance Core, the central component of desktops, notebooks, servers, cloud CPUs and emerging AI platforms. As part of the Out-of-Order team, you will define micro-architecture, develop RTL and drive the implementation of complex allocation and resource management mechanisms in high-performance CPU cores. You will own features from architecture exploration through RTL development, validation support, debug and tape-in readiness.

Key responsibilities

• Define micro-architecture and develop RTL for complex allocation and resource management mechanisms in Intel's CPU cores.
• Own features from architecture exploration through RTL development, validation support, debug and tape-in readiness.
• Lead significant design efforts and drive micro-architectural tradeoff discussions.
• Collaborate closely with architecture, verification, physical design, power-performance and post-silicon teams.

Required profile

• B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering or a related field.
• At least 5 years of experience in RTL logic design and development using SystemVerilog.
• Strong understanding of computer architecture, micro-architecture and digital design principles.
• Ability to independently drive features from definition through implementation and validation.
• Excellent communication and teamwork skills.

Required skills

• RTL logic design and development in SystemVerilog.
• Nice to have: design partitioning and micro-architectural tradeoff analysis, functional validation and coverage plans, timing closure, power optimization and performance analysis, power-aware RTL coding and debugging, scripting and automation, and experience with geographically distributed teams.

The role is based in Haifa, Israel, and is eligible for a hybrid work model.